EvalKernel (issie)

EvalKernel Module

Namespace: global
Assembly: Renderer.dll

Functions and values

Function or value	Description
`algAnd exp1 exp2` Full Usage: `algAnd exp1 exp2` Parameters: exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp` Modifiers: inline	exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp`
`algGate gateType` Full Usage: `algGate gateType` Parameters: gateType : `GateComponentType` Returns: `FastAlgExp -> FastAlgExp -> FastAlgExp` Modifiers: inline	gateType : `GateComponentType` Returns: `FastAlgExp -> FastAlgExp -> FastAlgExp`
`algNand exp1 exp2` Full Usage: `algNand exp1 exp2` Parameters: exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp` Modifiers: inline	exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp`
`algNor exp1 exp2` Full Usage: `algNor exp1 exp2` Parameters: exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp` Modifiers: inline	exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp`
`algNot exp` Full Usage: `algNot exp` Parameters: exp : `FastAlgExp` Returns: `FastAlgExp` Modifiers: inline	exp : `FastAlgExp` Returns: `FastAlgExp`
`algOr exp1 exp2` Full Usage: `algOr exp1 exp2` Parameters: exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp` Modifiers: inline	exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp`
`algXnor exp1 exp2` Full Usage: `algXnor exp1 exp2` Parameters: exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp` Modifiers: inline	exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp`
`algXor exp1 exp2` Full Usage: `algXor exp1 exp2` Parameters: exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp` Modifiers: inline	exp1 : `FastAlgExp` exp2 : `FastAlgExp` Returns: `FastAlgExp`
`assertThat cond msg` Full Usage: `assertThat cond msg` Parameters: cond : `bool` msg : `string` Modifiers: inline	cond : `bool` msg : `string`
`bitAnd bit0 bit1` Full Usage: `bitAnd bit0 bit1` Parameters: bit0 : `^a` bit1 : `^a` Returns: `^a` Modifiers: inline Type parameters: ^a	bit0 : `^a` bit1 : `^a` Returns: `^a`
`bitGate gateType` Full Usage: `bitGate gateType` Parameters: gateType : `GateComponentType` Returns: `^a -> ^a -> ^a` Modifiers: inline Type parameters: ^a	gateType : `GateComponentType` Returns: `^a -> ^a -> ^a`
`bitNand bit0 bit1` Full Usage: `bitNand bit0 bit1` Parameters: bit0 : `uint32` bit1 : `uint32` Returns: `uint32` Modifiers: inline	bit0 : `uint32` bit1 : `uint32` Returns: `uint32`
`bitNor bit0 bit1` Full Usage: `bitNor bit0 bit1` Parameters: bit0 : `uint32` bit1 : `uint32` Returns: `uint32` Modifiers: inline	bit0 : `uint32` bit1 : `uint32` Returns: `uint32`
`bitNot bit` Full Usage: `bitNot bit` Parameters: bit : `uint32` Returns: `uint32` Modifiers: inline	bit : `uint32` Returns: `uint32`
`bitNotB width bit` Full Usage: `bitNotB width bit` Parameters: width : `int32` bit : `BigInteger` Returns: `BigInteger` Modifiers: inline	width : `int32` bit : `BigInteger` Returns: `BigInteger`
`bitOr bit0 bit1` Full Usage: `bitOr bit0 bit1` Parameters: bit0 : `^a` bit1 : `^a` Returns: `^a` Modifiers: inline Type parameters: ^a	bit0 : `^a` bit1 : `^a` Returns: `^a`
`bitXnor bit0 bit1` Full Usage: `bitXnor bit0 bit1` Parameters: bit0 : `uint32` bit1 : `uint32` Returns: `uint32` Modifiers: inline	bit0 : `uint32` bit1 : `uint32` Returns: `uint32`
`bitXor bit0 bit1` Full Usage: `bitXor bit0 bit1` Parameters: bit0 : `^a` bit1 : `^a` Returns: `^a` Modifiers: inline Type parameters: ^a	bit0 : `^a` bit1 : `^a` Returns: `^a`
`extractBit fd busWidth` Full Usage: `extractBit fd busWidth` Parameters: fd : `FastData` busWidth : `int` Returns: `uint32` Modifiers: inline	Assert that the FData only contain a single bit, and return such bit. fd : `FastData` busWidth : `int` Returns: `uint32`
`extractBitFData fd_ busWidth` Full Usage: `extractBitFData fd_ busWidth` Parameters: fd_ : `FData` busWidth : `int` Returns: `uint32` Modifiers: inline	fd_ : `FData` busWidth : `int` Returns: `uint32`
`getBinaryOp gateType` Full Usage: `getBinaryOp gateType` Parameters: gateType : `GateComponentType` Returns: `uint32 -> uint32 -> uint32` Modifiers: inline	gateType : `GateComponentType` Returns: `uint32 -> uint32 -> uint32`
`getRamState step state` Full Usage: `getRamState step state` Parameters: step : `int` state : `StepArray<SimulationComponentState> option` Returns: `SimulationComponentState`	The state-array entry a RAM's store lives in. Every step holds the same entry: the store is mutable and shared, so what a slot records is which memory this is, not what it contained. Reducers therefore fetch this value and put the very same object back rather than building `RamState store` again - constructing that union case allocates, and a fresh one per clock is precisely the per-step cost this design exists to remove. step : `int` state : `StepArray<SimulationComponentState> option` Returns: `SimulationComponentState`
`getRamStore step state` Full Usage: `getRamStore step state` Parameters: step : `int` state : `StepArray<SimulationComponentState> option` Returns: `Ram`	The store a RAM keeps its contents in, for a step that only reads it. step : `int` state : `StepArray<SimulationComponentState> option` Returns: `Ram`
`getRomStateMemory comp` Full Usage: `getRomStateMemory comp` Parameters: comp : `FastComponent` Returns: `Memory`	comp : `FastComponent` Returns: `Memory`
`incrementWithinWidth width lastOut` Full Usage: `incrementWithinWidth width lastOut` Parameters: width : `int` lastOut : `uint32` Returns: `uint32` Modifiers: inline	Increment, wrapping to 0 at 2^width. Used by the counters on the uint32 path, which counted in bigint and so allocated several heap bigints per component per step on what is meant to be the fast path. At width 32 uint32 addition wraps to 0 of its own accord, which is the wanted result, and the wrap test cannot be written there in any case since 1u <<< 32 is 1u. width : `int` lastOut : `uint32` Returns: `uint32`
`packBit bit` Full Usage: `packBit bit` Parameters: bit : `uint32` Returns: `FastData` Modifiers: inline	bit : `uint32` Returns: `FastData`
`packBitFData bit` Full Usage: `packBitFData bit` Parameters: bit : `uint32` Returns: `FData` Modifiers: inline	bit : `uint32` Returns: `FData`
`ramStoreOf state` Full Usage: `ramStoreOf state` Parameters: state : `SimulationComponentState` Returns: `Ram`	state : `SimulationComponentState` Returns: `Ram`
`readMemoryAddrBigIntDataBigInt mem address` Full Usage: `readMemoryAddrBigIntDataBigInt mem address` Parameters: mem : `Memory1` address : `bigint` Returns: `bigint`	mem : `Memory1` address : `bigint` Returns: `bigint`
`readMemoryAddrBigIntDataUInt32 mem address` Full Usage: `readMemoryAddrBigIntDataUInt32 mem address` Parameters: mem : `Memory1` address : `bigint` Returns: `uint32`	mem : `Memory1` address : `bigint` Returns: `uint32`
`readMemoryAddrUInt32DataBigInt mem address` Full Usage: `readMemoryAddrUInt32DataBigInt mem address` Parameters: mem : `Memory1` address : `uint32` Returns: `bigint`	mem : `Memory1` address : `uint32` Returns: `bigint`
`readMemoryAddrUInt32DataUInt32 mem address` Full Usage: `readMemoryAddrUInt32DataUInt32 mem address` Parameters: mem : `Memory1` address : `uint32` Returns: `uint32`	Read the content of the memory at the specified address. mem : `Memory1` address : `uint32` Returns: `uint32`
`readMemoryFData mem address` Full Usage: `readMemoryFData mem address` Parameters: mem : `Memory1` address : `FData` Returns: `FData`	mem : `Memory1` address : `FData` Returns: `FData`
`readRamAddrBigIntDataBigInt ram address` Full Usage: `readRamAddrBigIntDataBigInt ram address` Parameters: ram : `Ram` address : `bigint` Returns: `bigint`	ram : `Ram` address : `bigint` Returns: `bigint`
`readRamAddrBigIntDataUInt32 ram address` Full Usage: `readRamAddrBigIntDataUInt32 ram address` Parameters: ram : `Ram` address : `bigint` Returns: `uint32`	ram : `Ram` address : `bigint` Returns: `uint32`
`readRamAddrUInt32DataBigInt ram address` Full Usage: `readRamAddrUInt32DataBigInt ram address` Parameters: ram : `Ram` address : `uint32` Returns: `bigint`	ram : `Ram` address : `uint32` Returns: `bigint`
`readRamAddrUInt32DataUInt32 ram address` Full Usage: `readRamAddrUInt32DataUInt32 ram address` Parameters: ram : `Ram` address : `uint32` Returns: `uint32`	ram : `Ram` address : `uint32` Returns: `uint32`
`readRamFData ram address` Full Usage: `readRamFData ram address` Parameters: ram : `Ram` address : `FData` Returns: `FData`	Read a RAM through the algebraic evaluator's value type. ram : `Ram` address : `FData` Returns: `FData`
`writeRamAddrBigIntDataBigInt ram step address data` Full Usage: `writeRamAddrBigIntDataBigInt ram step address data` Parameters: ram : `Ram` step : `int` address : `bigint` data : `bigint`	ram : `Ram` step : `int` address : `bigint` data : `bigint`
`writeRamAddrBigIntDataUInt32 ram step address data` Full Usage: `writeRamAddrBigIntDataUInt32 ram step address data` Parameters: ram : `Ram` step : `int` address : `bigint` data : `uint32`	ram : `Ram` step : `int` address : `bigint` data : `uint32`
`writeRamAddrUInt32DataBigInt ram step address data` Full Usage: `writeRamAddrUInt32DataBigInt ram step address data` Parameters: ram : `Ram` step : `int` address : `uint32` data : `bigint`	ram : `Ram` step : `int` address : `uint32` data : `bigint`
`writeRamAddrUInt32DataUInt32 ram step address data` Full Usage: `writeRamAddrUInt32DataUInt32 ram step address data` Parameters: ram : `Ram` step : `int` address : `uint32` data : `uint32`	Writes take the step they happen at, because that is what the history is keyed by. They return unit: there is no new memory to thread through, and the old contents the reducer must output are read before the write, as they always were. ram : `Ram` step : `int` address : `uint32` data : `uint32`
`writeRamFData ram step address data` Full Usage: `writeRamFData ram step address data` Parameters: ram : `Ram` step : `int` address : `FastData` data : `FastData`	ram : `Ram` step : `int` address : `FastData` data : `FastData`