Technical Reports on Issie

These reports document in detail the parts of Issie created by FYP students. HLP and Summer UTOP/UROP contributions do not come with such documentation!

Year	Report	Author	Notes
2020	The original Issie design	Marco Selvatici	The Schematic Editor and Simulator have been completely reworked since this.
2022	Implementing Truth Tables on Issie	Aditya Deshpande	The report does not fully describe all of the features that were implemented.
2023	The Verilog Editor and Compiler	Petra Ratkai	Round 2 of the Verilog compiler work
2023	Improving the Simulator	Yujie Wang	How to improve performance
2024	Porting Issie to .Net	Kaiwen Liu	Attempt to use Avalonia/.Net instead of HTML/CSS / Javascript