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SimulationComponentState Type

State (possibly none) remembered by component from previous clock cycle. Combinational components have no state.

Union cases

Union case Description

DffState uint32

Full Usage: DffState uint32

Parameters:
    Item : uint32

Item : uint32

NoState

Full Usage: NoState

RamState Ram

Full Usage: RamState Ram

Parameters:

A read/write memory's contents. Not a `Memory1`: that would mean building a whole `Map` for every clock step, which is the cost `RamStore` exists to remove. The store is mutable and shared by every step, so the step it is being read at has to be supplied alongside - see [docs/dev/ramRepresentation.md].

Item : Ram

RegisterState FastData

Full Usage: RegisterState FastData

Parameters:
Item : FastData

Instance members

Instance member Description

this.IsDffState

Full Usage: this.IsDffState

Returns: bool
Returns: bool

this.IsNoState

Full Usage: this.IsNoState

Returns: bool
Returns: bool

this.IsRamState

Full Usage: this.IsRamState

Returns: bool
Returns: bool

this.IsRegisterState

Full Usage: this.IsRegisterState

Returns: bool
Returns: bool

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