SimulationView (issie) | issie

SimulationView Module

Namespace: global
Assembly: Renderer.dll

Nested modules

Modules	Description
Constants

Functions and values

Function or value	Description
`InputDefaultsEqualInputs fs model clocktick` Full Usage: `InputDefaultsEqualInputs fs model clocktick` Parameters: fs : `FastSimulation` model : `Model` clocktick : `int` Returns: `bool`	fs : `FastSimulation` model : `Model` clocktick : `int` Returns: `bool`
`InputDefaultsEqualInputsRefresh fs model` Full Usage: `InputDefaultsEqualInputsRefresh fs model` Parameters: fs : `FastSimulation` model : `Model` Returns: `bool`	fs : `FastSimulation` model : `Model` Returns: `bool`
`changeBase dispatch numBase` Full Usage: `changeBase dispatch numBase` Parameters: dispatch : `Msg -> 'a` numBase : `NumberBase` Returns: `'a`	dispatch : `Msg -> 'a` numBase : `NumberBase` Returns: `'a`
`cmd block` Full Usage: `cmd block` Parameters: block : `Async<unit> -> unit` Returns: `('a -> Async<'b>) -> 'a -> ('b -> 'c) -> Cmd<'c>`	block : `Async<unit> -> unit` Returns: `('a -> Async<'b>) -> 'a -> ('b -> 'c) -> Cmd<'c>`
`doBatchOfMsgsAsynch msgs` Full Usage: `doBatchOfMsgsAsynch msgs` Parameters: msgs : `Msg seq` Returns: `Cmd<Msg>`	msgs : `Msg seq` Returns: `Cmd<Msg>`
`getPosRotNextToPort port model dist` Full Usage: `getPosRotNextToPort port model dist` Parameters: port : `Port` model : `Model` dist : `float` Returns: `(XYPos * Rotation) option`	get the position and rotation for inserting a new component next to the given port at a given distance the rotation is such that the original left side of the component (input side) faces the given port returns None if another symbol is in the way port : `Port` model : `Model` dist : `float` Returns: `(XYPos * Rotation) option`
`getSimErrFeedbackMessages simError model` Full Usage: `getSimErrFeedbackMessages simError model` Parameters: simError : `SimulationError` model : `Model` Returns: `Msg list`	simError : `SimulationError` model : `Model` Returns: `Msg list`
`makeIOLabel label width` Full Usage: `makeIOLabel label width` Parameters: label : `string` width : `int` Returns: `string`	Pretty print a label with its width. label : `string` width : `int` Returns: `string`
`setFastSimInputsToDefault fs` Full Usage: `setFastSimInputsToDefault fs` Parameters: fs : `FastSimulation`	fs : `FastSimulation`
`setInputDefaultsFromInputs fs dispatch clocktick` Full Usage: `setInputDefaultsFromInputs fs dispatch clocktick` Parameters: fs : `FastSimulation` dispatch : `Msg -> Unit` clocktick : `int`	fs : `FastSimulation` dispatch : `Msg -> Unit` clocktick : `int`
`setSimErrorFeedback simError model dispatch` Full Usage: `setSimErrorFeedback simError model dispatch` Parameters: simError : `SimulationError` model : `Model` dispatch : `Msg -> Unit`	simError : `SimulationError` model : `Model` dispatch : `Msg -> Unit`
`simulateWithProgressBar simProg model` Full Usage: `simulateWithProgressBar simProg model` Parameters: simProg : `SimulationProgress` model : `Model` Returns: `Model * Cmd<Msg>`	simProg : `SimulationProgress` model : `Model` Returns: `Model * Cmd<Msg>`
`simulateWithTime timeOut steps simData` Full Usage: `simulateWithTime timeOut steps simData` Parameters: timeOut : `'a` steps : `int` simData : `SimulationData` Returns: `float`	timeOut : `'a` steps : `int` simData : `SimulationData` Returns: `float`
`simulationClockChangeAction dispatch simData model'` Full Usage: `simulationClockChangeAction dispatch simData model'` Parameters: dispatch : `Msg -> unit` simData : `SimulationData` model' : `Model`	dispatch : `Msg -> unit` simData : `SimulationData` model' : `Model`
`tryGetSimData isWaveSim (arg2, arg3) model` Full Usage: `tryGetSimData isWaveSim (arg2, arg3) model` Parameters: isWaveSim : `bool` arg1 : `Component list` arg2 : `Connection list` model : `Model` Returns: `Result<SimulationData, SimulationError>`	isWaveSim : `bool` arg1 : `Component list` arg2 : `Connection list` model : `Model` Returns: `Result<SimulationData, SimulationError>`
`verilogOutput vType model dispatch` Full Usage: `verilogOutput vType model dispatch` Parameters: vType : `VMode` model : `Model` dispatch : `Msg -> Unit`	save verilog file TODO: the simulation error display here is shared with step simulation and also waveform simulation - maybe it should be a subfunction. vType : `VMode` model : `Model` dispatch : `Msg -> Unit`
`viewSimulationData step simData model dispatch` Full Usage: `viewSimulationData step simData model dispatch` Parameters: step : `int` simData : `SimulationData` model : `'a` dispatch : `Msg -> unit` Returns: `ReactElement`	step : `int` simData : `SimulationData` model : `'a` dispatch : `Msg -> unit` Returns: `ReactElement`
`viewSimulationError (comps, conns) simError model simType dispatch` Full Usage: `viewSimulationError (comps, conns) simError model simType dispatch` Parameters: comps : `Component list` conns : `Connection list` simError : `SimulationError` model : `Model` simType : `SimSubTab` dispatch : `Msg -> unit` Returns: `ReactElement`	comps : `Component list` conns : `Connection list` simError : `SimulationError` model : `Model` simType : `SimSubTab` dispatch : `Msg -> unit` Returns: `ReactElement`