last step number (starting from 0) which is simulated.

The design this was built from - its sheets, their components and connections, and the instance queries answered by walking them. The size of the design rather than of the expansion, and the only part of a simulation a renderer needs when the simulating is happening in another process.

Each driver represents one output with its data

clocked components

Fast components: this array is longer than FOrderedComps because it contains IOlabel components that are redundant in the simulation. It doe snot contain custom Components Every component of the build at its own index - what a FastCompIndex indexes, and what the links between components are expressed in. Ordinary and custom alike, in the order the flatten created them, so walking it walks memory forwards.

constants

look up from output port of custom component to the relevant Output component

top-level inputs to the simulation

Which component of each IOLabel group the build elected to drive it. A label key, not a component one - the only thing in the simulator keyed by anything other than ComponentId, FComponentId or FastCompIndex, and deliberately so. The components of an IOLabel group SHARE a label and are one net: what has to be looked up is the net, in one instance, and only then which component of it carries the data. So the key is (the label, the access path of the instance), and the value is the answer.

list of deferred links driven from inactive IOlabls - at end of linkage the corresponding active IOLabel can be substituted as driver an dthe link made

Where a design-time name sits in that array - the ONE map a built simulation keeps, and the only way in from outside. A saved wave selection, a RAM the user picked, a component clicked on the canvas: all of them arrive as a name, resolve here once, and everything after that is an index.

Components that will be reduced in order allowing sequential reduction to implement simulation

Maximum size of simulation arrays - after which they form a circular buffer

Total number of step arrays (= drivers)

What one clock cycle of this design costs in step arrays. Worked out before the arrays were allocated, by FastCreate.stepCostOfGraph, and kept so that the waveform simulator's configuration can say what a given number of cycles would come to.

Each wave index represents one component port with associated driver and data

Any component of the build, ordinary or custom. This used to be a third map, WaveComps, holding the union of the two - built by folding one into the other after every build, which on a design of 120,000 components is a copy of all of them for a lookup that is two tries. It was also the only reason a wave viewer needed a structure the wave tables built, so removing it is what lets the same code answer from a build made without them. The component at one index of this build. Not valid across builds: an index names a slot in the store that made it, which is why what OUTLIVES a build is the design-time name.

The same, for a caller that knows the component is there and says so - the callers that used to index WaveComps directly. Raises naming the id when it is not, which is what indexing a map did.

The design-sized fields, under the names they had when they were fields of this record. They read through to `Design`, which is where they live now - so that the design can be held, and asked, without a simulation to hang it on.

The design-time name of the sheet an instance is of: what the user called it, and what they see in the Sheets menu. An instance is a path; this says which sheet it is a copy of.

The custom component an instance is the innards of, or None for the top sheet.